About: Liviu Militaru

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An Entity of Type : foaf:Person, within Data Space : data.idref.fr associated with source document(s)

Attributes	Values
type	Person
sameAs	Militaru, Liviu (19..-....) Militaru, Liviu (19..-....) Militaru, Liviu (19..-....)
alternative label	Militaru, Liviu-Laurentiu
Life Event	http://www.idref.fr/14496869X/birth
preferred label	Militaru, Liviu (19..-....)
name	Liviu Militaru
dbpedia-owl:citizenship	http://sws.geonames.org/3017382/
Language	http://lexvo.org/id/iso639-3/fra
Given name	Liviu
familyName	Militaru
has biographical i...tion (Deprecated)	Co-directeur de thèses préparées au laboratoire Institut des Nanotechnologies de Lyon (INL) et soutenues à l’INSA Lyon (depuis 2019-...)
note	Titutlaire d’un doctorat en dispositifs de l’électronique intégrée (INSA Lyon, 2000). Maître de conférences (INSA Lyon )
gender	male
Scopus ID	6602302187
is Thesis advisor of	http://www.sudoc.fr/144968053/id http://www.sudoc.fr/176584161/id http://www.sudoc.fr/185280161/id http://www.sudoc.fr/145374521/id Caractérisation, modélisation et fiabilité des diélectriques de grille à base de HfO2 pour les futures technologies CMOS http://www.sudoc.fr/19158858X/id http://www.sudoc.fr/249449684/id http://www.sudoc.fr/248236539/id Etude de la fiabilité des mesures électriques par la microscopie à force atomique sur couches diélectriques ultra-minces, Développement d'une technique de pompage de charge résolue spatialement pour la caractérisation des défauts d'interface http://www.sudoc.fr/270365249/id http://www.sudoc.fr/270396004/id http://www.sudoc.fr/249034344/id The Back-End Selector, From material development to device performances Nanostructures d'oxyde d'indium pour les mémoires résistives RRAM intégrées en CMOS Back-End-Of-Line http://www.sudoc.fr/247177318/id http://www.sudoc.fr/281505144/id Caractérisation des courants de fuite à l'échelle nanométrique dans les couches ultra-minces d'oxydes pour la microélectronique
is Author of	http://www.sudoc.fr/066778182/id Optimization of resistive memories using In2O3 nanostructures integration with a CMOS Back-End-Off-Line process Indium-oxide nanoparticles for Ox-RRAM in CMOS back-end-off-line Ion beam synthesis of indium-oxide nanocrystals for improvement of oxide resistive random-access memories Influence of the surrounding ambient on the reliability of the electrical characterization of thin oxide layers using an atomic force microscope https://hal.archives-ouvertes.fr/hal-01701531#id Metrology issues in the measurement of very small currents and capacitances by atomic force microscopy http://www.sudoc.fr/246602473/id Etude des défauts induits lors de l'intégration des transistors bipolaires a hétérojonction Si/SiGe dans une technologie BiCMOS avancée Shadow Edge Lithography coupled with ALD growth of Alumina and Platinum Nanoislands Towards the Fabrication of Single Electron Transistors Indium-oxide nanoparticles for RRAM devices compatible with CMOS back-end-off-line Pt nanoislands embedded in Al2O3 matrix: from ALD-based fabrication to structural to electrical characterization Indium-oxide nanoparticles for Ox-RRAM in CMOS back-end-off-line PEALD Platinum Nano-island SET Fabrication and Electrical Characterization Toward a better understanding of the nanoscale degradation mechanisms of ultra-thin Si0 2 /Si films: Investigation of the best experimental conditions with a conductive-atomic force microscope Investigation of the in-plane and out-of-plane electrical properties of metallic nanoparticles in dielectric matrix thin films elaborated by atomic layer deposition PEALD of Pt nanoparticles: towards the development of single electron transistors and flexible strain sensors Miniaturized Tunable TeraHertz Antenna Based on Graphene Etude électrique et physique à l’échelle nanométrique des couches minces de SiO2 thermique sous différentes atmosphères Shadow Edge Evaporation for Single Electron Transistors Indium oxide nanoparticles for Resistive RAM integration using a compatible industrial technology Indium Oxide Nanostructure Optimization for RRAM Integration on CMOS BEOL Innovative Multilayer OTS Selectors for Performance Tuning and Improved Reliability Investigation of Electrical Characteristics of Multi-Gate Bulk nMOSFET Ge content optimization in Ge(SbSe)$_{1-x}$N OTS materials for selector applications ALD growth of Platinum Nanoislands on Alumina for Single Electron Transistors Applications Tunneling atomic force microscopy for the nanoscale electrical and physical characterization of thin gate oxide films in different surrounding ambient Experimental Study of a Bulk-Technology Tri-gates nMOSFET Effect of interface traps for ultra-thin high-k gate dielectric based MIS devices on the capacitance-voltage characteristics Electrical characterization and TCAD simulations of multi-gate bulk nMOSFET Multilayer structure in SeAsGeSi-based OTS for high thermal stability and reliability enhancement Spurious phenomena occuring during current measurement on ultra-thin dielectric layers: From electro-thermal effects to surface damage High temperature and voltage dependent electrical and dielectric properties of TiN/Al2O3/p-Si MIS structure Multilayer OTS selectors engineering for high temperature stability, scalability and high endurance
is primary topic of	http://www.idref.fr/14496869X
is Opponent of	http://www.sudoc.fr/234454458/id
is Thesis referee of	http://www.sudoc.fr/192290207/id http://www.sudoc.fr/200043293/id

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